DefineView Consulting

DefineView Consulting provides SystemVerilog, Comprehensive Verilog and Expert VHDL training (on-site and on-line) to ASIC/SoC Design and Verification engineering community at large.

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About Us

US PATENTS BY ASHOK MEHTA

Ashok Mehta have been granted 21 US Patents to date.
Subject matter of the patents is;

Design Verification of SoC, 2.5D IC and 3DIC (stacked dies).
Progressive reusable refinement of Verification environment / testbench from Algorithm to RTL level.
Simulating RTL with TLM2.0 ESL Models.

Why Choose Us

Experience Since 1991

Ashok Mehta has worked in the ASIC/SoC design and verification field for over 30 years. He worked at DEC, DG, INTEL, AMCC and TSMC.

Experienced Teachers

Best Quality Graduate

Online Class Support

Testimonial

“I knew Zero about assertions going in. I learned a great deal about finer nuances and practical applications of SVA. Gained good confidence by the time the class was done”

“Learning SVA is a bit like learning a foreign language. While you can learn the grammar from a book, its subtlety and expressiveness can only be grasped from a conversation with an educated native speaker. Ashok brings invaluable practical insights on how SVA will help you survive in the DV trenches.”

“I like the training very much since it’s packed full of technical explanations and examples of System Verilog Assertion. You slides are also easy to follow and understand.”

Books

BOOKS BY ASHOK MEHTA

SystemVerilog Assertions and Functional Coverage provides an application oriented in-depth guide to language, methodology and applications of SystemVerilog Assertions and Functional Coverage Languages. Used by engineering community at large, it will serve as an excellent Reference Book.