Services offered

Services offered

 

  • ASIC/FPGA/SoC Verification methodology review and assessment.
  • Guide clients on creating efficient, reusable Verification Architecture, Methodology and Test Plan: Customized to client’s Design
  • Coverage Driven Verification (CDV)
  • Assertion Based Verification (ABV)
  • Coverage Methodology (Code, Functional, Sequential Logic)
  • Constrained Random Verification
  • Behavioral (modular, reusable) Testbench Methodology in Verilog
  • Static Formal verification
  • Expert training in SystemVerilog Assertions and Functional Coverage: Customized to your requirements
  • Technical guidance on deployment of SystemVerilog Assertions and Functional Coverage Methodology. Note that SVA and FC adoption does not require knowledge of UVM or SystemVerilog Object Oriented Programming.
  • Hands-on Development of project specific SVA Assertions and Functional Coverage points (Covergroups, Coverpoints, etc.)
  • System Level Virtual Platform (ESL/TLM 2.0) development Guidance for Test Generation and Software Development